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Founding Engineer - Cluster / PCB Engineer

ZettascaleSan Francisco, CA, USPosted 2mo ago
$150K - $300K · 0.50% - 2.00% equity
Full-time
<h1><strong>We're Building the Next Generation of Chips to Power AI. Join Us.</strong></h1> <p><strong>At Zetta, we're building the next NVIDIA to accelerate AI discovery. Our XPU chips are state-of-the-art AI compute engines</strong>, versatile and efficient enough to support <strong><em>AGI</em></strong>, and eventually <strong><em>ASI</em></strong>, without requiring massive power infrastructure.</p> <p>The team consists of exceptional engineers <strong>obsessed</strong> with pushing the boundaries of what's possible in computing, <strong>and we're now seeking our next technical member!</strong></p> <h3><strong>You Are</strong></h3> <ul> <li><strong>Ready to go all-in and do the work of your life</strong></li> <li><strong>Willing to be hardcore when pushing technical boundaries</strong></li> <li>A systems-level hardware engineer who thinks from chip pins all the way to the data center floor</li> <li>Deeply <strong>passionate</strong> and <strong>obsessed</strong> with computing and AI</li> <li>Hungry to build something that actually matters</li> </ul> <h3><strong>Your Background</strong></h3> <ul> <li>Background in Electrical Engineering, Mechanical Engineering, Engineering Physics, <em>or equivalent field</em></li> <li><strong>Strong high-speed PCB design experience</strong> (high layer count, controlled impedance, stackup design, via optimization)</li> <li><strong>Signal integrity &amp; power integrity expertise</strong> (SI/PI simulation, eye diagrams, S-parameter analysis, decoupling strategy, IR drop)</li> <li><strong>High-speed interface design</strong> (PCIe Gen5/6, CXL, DDR5/HBM, Ethernet 400G/800G, SerDes routing)</li> <li><strong>Proficiency with PCB toolchains</strong> (Altium, Cadence Allegro, KiCad, HyperLynx, Ansys SIwave/HFSS)</li> <li><strong>Cluster &amp; system-level design experience</strong> (server/blade architecture, backplanes, rack-scale interconnect topologies)</li> <li><strong>Thermal &amp; cooling expertise</strong> (air, liquid, and immersion cooling; thermal simulation; cold plate design; airflow modeling)</li> <li><strong>Power delivery design</strong> (multi-phase VRMs, high-current PDN, board-level power sequencing)</li> <li><strong>Bring-up &amp; debug expertise</strong> (oscilloscopes, VNAs, TDR, BERT, JTAG, root-causing SI/PI/thermal issues on real boards)</li> <li><strong>Build/flow automation and tooling</strong> (Python, Tcl, Nix)</li> <li><strong>Work across PCB, mechanical, thermal, and system architecture</strong> to hit cluster-level PPA targets</li> </ul> <h3><strong>Huge Plus If</strong></h3> <ul> <li><strong>Experience designing AI/HPC accelerator boards or systems</strong> (GPU servers, TPU pods, custom ASIC carrier boards)</li> <li><strong>Rack-scale &amp; data center experience</strong> (OCP designs, NVLink/NVSwitch-class fabrics, optical interconnects, top-of-rack networking)</li> <li><strong>DFM/DFT-aware PCB design</strong> (manufacturability reviews, test point strategy, boundary scan, bed-of-nails)</li> <li><strong>1+ years (or equivalent) designing high-speed, high-layer-count PCBs</strong> for ASICs, GPUs, or networking gear</li> <li><strong>Mechanical/enclosure design experience</strong> (sheet metal, chassis design, working with ME/Industrial Design teams)</li> <li><strong>HW/SW boundary experience</strong> (board bring-up, BMC/firmware, telemetry, profiling, build systems)</li> <li>Autodidactic polymath with a strong mathematical background</li> <li><strong>Someone who doesn't fret when faced with near-impossible technical challenges</strong></li> </ul> <h3><strong>The Opportunity</strong></h3> <ul> <li><strong>Be one of the first employees shaping a revolutionary technology</strong></li> <li>Work directly with the founding team of exceptional engineers at our San Francisco HQ</li> <li>Own critical decisions that will influence the future of AI compute</li> <li>Grow into a technical leader as we scale</li> <li>Highly competitive compensation + significant equity</li> </ul> <p><strong>This is THE chance to do the work of your life.</strong> The chance to build s